icm - 30630 - c 6 - m i - general description the single - chip icm - 30630 is the worlds first tri - core 6 - axis motion tracking solution with integrated sensor - hub framework software. it combines industry leading gyroscope and accelerometer sensors with tri- core processors (an arm cortex - m0 cpu, a dmp3 and a dmp4 digital motion processor?) in a small 3x3x1mm lga package. the icm - 30630 serves as a sensor hub that supports the collection and processing of data from internal and external sensors. the multi - cores are designed to offload processing from th e application processor, thereby saving system power and improving performance. the arm cortex - m0 cpu provides a low - power programmable platform for software development. the dmp3 offloads android l processing from the cpu, and provides ready - to - use ph ysical and virtual android sensors. the dmp4 is optimized for fixed point processing and fft generation, complimenting the cpu by offloading math intensive operations. the integrated invensense sensor framework provides an open and powerful platform for c reating cutting - edge alwayson applications for mobile platforms. developers can use built - in framework components to rapidly develop and launch new features. the command protocol is designed for seamless porting to new systems, allowing software reuse an d therefore maximizing returns on software investment. applications ? smartphones and tablets ? wearables features ? tri - cor e sensor hub with integrated 6 - axis in a 24 - p in lga: 3 mm x 3 mm x 1 mm p ackage ? built - in sensor framework for fast time - to - market ? low power 6 - axis device: o 2.25 mw 6 - axis power (gyro+accel 102.3 hz odr) ? android l support ? on - chip runtime calibration ? auxiliary i 2 c interface to support additional sensors, enabling m ult i - sensor motionfusion operation ? 3- axis gyroscope with programmable fsr of 250, 500, 1000, and 2000 dps ? 3- axis accelerometer with programmable fsr of 2g, 4g, 8g and 16g ? arm cortex - m0 cpu & dmp3 and dmp4 ? flash 64 kbytes ? sram 64 kbytes (shared by cortex - m0, dmps, fifo) ? dma controller ? four timers t hat can be used for timestamp, watchdog, and general purpose timer functions ? serial - wire data port for cortex - m0 debug/t race ? three on - chip oscillators for system clock, accurate time stamping, and periodic wakeup ? 3 gpio bidirectional pins configurable as general purpose input/output, or interrupt input/output ? i2c up to 2.7 mhz; spi up to 6.4 mhz invensense eseves e cne e e seccns s e ee e veens n e esn s cs. invensense inc. 1745 technology drive, san jose, ca 95110 u.s.a +1(408) 988 C 7339 www.invensense.com document number: icm - 30630 revision: 1.0 release date: preliminary 03/10/2015
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